Moderate inversion in SOI MOSFET's with grain boundaries

1 October 1983

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 4 (10) , 344-346
https://doi.org/10.1109/EDL.1983.25757

Abstract

Our previous model for the effects of grain boundaries on the strong-inversion (linear region) conductance of silicon-on-insulator (SOI) MOSFET's is extended to account for moderate inversion. The extension, which is supported by measurements of laser-recrystallized devices, predicts a nearly exponential dependence for the conductance on the (front) gate voltage that is controlled by the grain boundaries.

Keywords

GRAIN BOUNDARIES
SEMICONDUCTOR FILMS
THRESHOLD VOLTAGE
SILICON ON INSULATOR TECHNOLOGY
DIELECTRIC MEASUREMENTS
INTEGRATED CIRCUIT MEASUREMENTS
LASER MODES
OPTICAL CONTROL
VOLTAGE CONTROL

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