Hardware Task/Processor Scheduling in a Polyprocessor Environment
- 1 July 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-33 (7) , 626-636
- https://doi.org/10.1109/tc.1984.5009336
Abstract
A special bus structure, the SYNCBUS, is proposed, which supports task scheduling by hardware. It can be used efficiently in multiprocessor-(all processors identical) and polyprocessor-systems (different pools of processors) running real-time multitasking software with a dynamic load distribution. Tasks waiting for execution create prioritized interrupts, which are distributed over all available processors by hardware. An ``optimal'' load distribution, where the tasks of currently highest priority are assigned to the processors of each pool, is automatically set up and updated continually. The SYNCBUS operates independently of the pool sizes; increasing or decreasing the number of processors in case of changing system requirements or faults is possible. Its decentralized structure allows parallel and local handling of task queues and eliminates processor queues. Overhead times are cut down for three reasons: the faster operation of hardware compared to software table searches, avoidance of memory conflicts due to accessing common system tables by multiple processors, and avoidance of scheduling cycles which do not result in an actual reassignment of tasks to processors. A performance analysis using a mathematical model shows that overhead times can be reduced, depending on the system size and the frequency of task switches, by a factor of up to 102.Keywords
This publication has 9 references indexed in Scilit:
- Performance Analysis and Power Allocation of Multi-Hop Multi-Branch Relays with Data Storage over Generalized Fading ChannelsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2012
- Efficient scheduling techniques for ROBDD constructionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1999
- The polybus: A flexible and fault-tolerant multiprocessor interconnectionInterfaces in Computing, 1984
- Biological dosimetry by chromosome aberration scoring with parallel image processing with the Heidelberg polyp polyprocessor systemComputers in Biology and Medicine, 1983
- The Heidelberg POLYP — A flexible and fault-tolerant poly-processorComputer Physics Communications, 1981
- A Fault-Tolerant Multi-Processor without BottlenecksIEEE Transactions on Nuclear Science, 1981
- Experience Using Multiprocessor Systems—A Status ReportACM Computing Surveys, 1980
- The impact of distributions and disciplines on multiple processor systemsCommunications of the ACM, 1979
- The Combinatorial Mathematics of SchedulingScientific American, 1978