Integration of a 90nm RF CMOS technology (200GHz f/sub max/ - 150GHz f/sub T/ NMOS) demonstrated on a 5GHz LNA

1 January 2004

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 100-101
https://doi.org/10.1109/vlsit.2004.1345416

Abstract

The potential for low power RF systems on chip of a 90nm CMOS technology is demonstrated for the first time on a monolithic 5GHz low noise amplifier. This technology combines a portfolio of high Q passive components with high RF performances 70nm physical gate length NMOSFETs (200GHz f/sub max/ -150GHz f/sub T/) presenting a ratio power gain/current gain higher than 1 up to the maximum measurement frequency.

Keywords

CMOS TECHNOLOGY
RADIO FREQUENCY
PERFORMANCE GAIN
SYSTEM-ON-A-CHIP
LOW-NOISE AMPLIFIERS
RADIOFREQUENCY AMPLIFIERS
PORTFOLIOS
PERFORMANCE EVALUATION
MOSFETS
CURRENT MEASUREMENT

This publication has 1 reference indexed in Scilit:

RF-CMOS performance trends
IEEE Transactions on Electron Devices, 2001