Energy minimisation for processor cores using variable supply voltages

Abstract
This paper presents an efficient technique for energy minimisation based on dynamically variable supply voltages. The efficiency is achieved by considering that power consumed by the core depends on the computation carried out on it. Energy is further minimised by allowing the voltage supply to vary continuously. The computational delay introduced due to supply voltage reduction is tolerated by exploiting the idle time while meeting the system time constraint. The energy minimisation problem is formulated and solved using an iterative improvement algorithm. Various examples with different task set complexities show the efficiency of the proposed technique. (4 pages)

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