Conductance of MOS transistors in saturation
- 1 January 1969
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 16 (1) , 108-113
- https://doi.org/10.1109/t-ed.1969.16571
Abstract
The output conductance of MOS transistors operating in the saturation region is studied theoretically and experimentally. A simple physical model is described which accounts for the modification of the electric field in the drain depletion region near the Si-SiO2interface, due to the presence of the gate electrode. The saturation conductance is shown on the basis of this model to be a sensitive function of the oxide thickness as well as the substrate impurity concentration. Good agreement is obtained between theory and experiment over a wide range of device parameters. The characteristics of lowly doped very-short-channel devices, which depart from this theory, are also discussed. The departure is shown to be due to a "punch-through"-type phenomenon.Keywords
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