Electrical and structural study of partially relaxed Ga0.92In0.08As(p+)/ GaAs(n) diodes

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Abstract
The effects of in‐plane lattice mismatch have been studied for Ga0.92In0.08As(p+)/GaAs(n)/GaAs(n+) diodes. Different in‐plane mismatch at the p–n junction was introduced by a variation of the GaInAs layer thickness (h=0.1, 0.25, 0.5, and 1 μm). Capacitance‐voltage (C‐V) measurements with different frequencies show a higher‐frequency dispersion for a greater lattice‐mismatched sample. From the frequency dependence of the C‐V curve, single‐level charged interface‐state density (Ns) was estimated using the effective parallel capacitance and conductance components. The average charged interface density Nss was also estimated using Voltage‐intercept (Vint) method. Nss shows a linear dependence on the in‐plane mismatch. The charged interface state density is approximately 2.7 Δa∥/a30 for partially lattice‐relaxed heterojunctions. For the 1 μm sample, the forward I‐V characteristic shows quasi‐Fermi level pinning effect. Admittance spectroscopy measurement gives an equilibrium Fermi energy at about Ev+0.36 eV with hole capture cross section cp=2.7×10−15 cm2 for the 1 μm sample and at Ev+0.21 eV and cp=2.4×10−16 cm2 for the 0.5 μm sample.