Advanced ECL with new active pull-down emitter-followers

6 January 2003

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 23-25
https://doi.org/10.1109/bipol.1988.51036

Abstract

Approaches to high-speed and high-load driving capability of bipolar logic gates are discussed. Several circuits are investigated. It is shown that the Emitter Coupled Logic (ECL) with FET pull-down emitter-followers has a 3-5 times greater capability of driving capacitive loads than the conventional one. The performance improvement is drastically enhanced when applied to GaAs LSIs Author(s) Itoh, H. Hitachi Ltd., Tokyo, Japan Saitoh, T. ; Yamada, T. ; Yamamoto, M. ; Masaki, A.

Keywords

SWITCHES
SWITCHING CIRCUITS
FETS
LOGIC ARRAYS
BIPOLAR TRANSISTORS
DELAY EFFECTS
LOGIC GATES
GALLIUM ARSENIDE
HIGH PERFORMANCE COMPUTING
LOGIC CIRCUITS

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