Self-aligned complementary bipolar transistors fabricated with a selective-oxidation mask

1 October 1987

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 34 (10) , 2146-2152
https://doi.org/10.1109/T-ED.1987.23209

Abstract

This paper deals with a self-aligned complementary transistor (vertical n-p-n and vertical p-n-p) structure that is ideal for high-speed and high-accuracy analog bipolar LSI circuits. The device structure consists of a 2-µm epitaxial layer, a non-LOCOS trench isolation buried with polysilicon, and complementary transistors, which are characterized by self-aligned active base and emitter. The key feature lies in the fabrication process, which forms an active base and emitter by ion implantations through a silicon nitride film by the use of an oxidation film that covers an extrinsic base as a mask [1]. The leakage current at the emitter-base junction can be minimized, because the ion-implantation-induced residual defects are confined in the emitter and the extrinsic base regions. The current gains of both transistors (n-p-n and p-n-p) remain constant down to a collector current of Ic= 10-9A. The typical distribution of the base-emitter offsets (ΔVBE) of transistor pairs was 0.2 mV as expressed in the standard deviation = 3σ. The maximum values of fTfor n-p-n and p-n-p transistors are 6 and 1.5 GHz, respectively.

Keywords

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