Optimal One-Bit Full Adders With Different Types of Gates

1 January 1974

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers

Vol. C-23 (1) , 63-70
https://doi.org/10.1109/t-c.1974.223778

Abstract

Optimal networks with thirty different types of restrictions are listed for the one-bit fuli adder. Optimality is derined as the minimization of the number of gates under different restrictions.

Keywords

MINIMIZATION
OPTIMAL
GATES
FULL ADDERS
LISTED
BIT FULL
FULI
DERINED

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