Applicability of a Subset of Ada as an Algorithmic Hardware Description Language for Graph-Based Hardware Compilation
- 1 April 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 4 (2) , 134-142
- https://doi.org/10.1109/tcad.1985.1270106
Abstract
The requirements of an algorithmic level hardware description language can be met by a software language with only limited feature enhancement. This paper discusses the feasibility of using a subset of Ada as a hardware description language. Methods are presented for realizing the extra features required for hardware description within the syntax of Ada. This allows the compiled Ada program to act as a functional simulator. Our particular context for hardware description is as a source language for a hardware compiler. Rules are presented for translating a circuit described in the Ada subset onto a control/data-flow graph (CDFG), our intermediate level form.Keywords
This publication has 3 references indexed in Scilit:
- Transforming an Ada Program Unit to Silicon and Verifying Its Behavior in an Ada Environment: A First ExperimentIEEE Software, 1984
- A design methodology and computer aids for digital VLSI systemsIEEE Transactions on Circuits and Systems, 1981
- Application of Graph Rewriting to Optimization and Parallelization of ProgramsPublished by Springer Nature ,1981