An 8 bit, 100 ms/s flash ADC
- 1 December 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (6) , 842-846
- https://doi.org/10.1109/jssc.1984.1052235
Abstract
An 8-bit flash ADC capable of operation at a sampling rate higher than 100 MHz with only 1.2 W of power dissipation is described. This good performance is realized using: (1) a small transistor utilizing oxide isolation and a thick field oxide process with small parasitic capacitances; (2) an optimized design for speed, accuracy, and power; and (3) a simple comparator design with small component count. Analog input capacitance of 35 pF and full-scale bandwidth of higher than 40 MHz were obtained. An error under the beat frequency test was eliminated by decoupling the master and the slave latches of the comparator.Keywords
This publication has 4 references indexed in Scilit:
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