The KSR 1: bridging the gap between shared memory and MPPs
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 41, 285-294
- https://doi.org/10.1109/cmpcon.1993.289682
Abstract
The KSR 1 bridges the gap between the historical shared memory model and massively parallel processors (MPPs) by delivering the shared memory programming model and all of its benefits in a scalable, highly parallel architecture. The KSR 1 runs a broad range of mainstream applications, ranging from numerically intensive computation to online transaction processing (OLTP) and database management and inquiry. The use of shared memory makes possible a standards-based open environment. The KSR 1's shared memory programming model is made possible by a new architectural technique called ALLCACHE memory.<>Keywords
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