Hydrogenation by ion implantation for scaled SOI/PMOS transistors

1 March 1985

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 6 (3) , 139-141
https://doi.org/10.1109/EDL.1985.26073

Abstract

Hydrogenation by ion implantation has been investigated as a promising technique for VLSI/SOI and has been correlated with the resultant characteristics of silicon-on-insulator (SOI) PMOS transistors fabricated in Polycrystalline silicon. SOI/PMOS ON currents increase by one order of magnitude and OFF currents decrease by two orders of magnitude. Hydrogenation improves weak-inversion slopes by nearly an order of magnitude. Channel-length scaling does not adversely affect leakage currents in SOI/PMOS devices in hydrogenated fine grain polysilicon down to a channel length of 2 µm on the mask, whereas devices in laser recrystallized polysilicon do show a degradation. SOI/PMOS transistors can be expected to replace resistors as load elements for 256K SRAM's.

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