An engineering environment for hardware/software co-simulation

2 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

No. 0738100X,p. 129-134
https://doi.org/10.1109/dac.1992.227848

Abstract

The authors describe an environment supporting concurrent hardware and software engineering for high performance systems. In place of a conventional bread-boarded prototype, they used distributed communicating processes to allow software and simulated hardware to interact. The Cadence Verilog-XL simulator was extended to enable software debugging and testing using hardware simulation. The environment was proven during a successful system design.<>

Keywords

HARDWARE DESIGN LANGUAGES
CIRCUIT SIMULATION
PRINTED CIRCUITS
MICROPROGRAMMING
BACKPLANES
COMPUTATIONAL MODELING
DEBUGGING
SOFTWARE PROTOTYPING
PROTOTYPES
SOFTWARE SYSTEMS

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