High-temperature leakage current suppression in CMOS integrated circuits

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Abstract
It has been found that the diffusion component of the pn junction drain-to-body reverse leakage current in a MOS transistor differs by as much as three orders of magnitude depending on whether it is fabricated in a substrate well or directly in the substrate. A theoretical description of the leakage suppession exhibited by a pn junction in a well is confirmed by measurement using a commercially available 3µm CMOS process, operating at temperatures up to 250°C.

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