A 256×4 BIT GaAs Static RAM

Abstract
A 256×4 bit GaAs Static RAM was fabricated by Pt-buried gate FET process technology. Chip size was 2.9mm × 4.0mm. A six transistor depletion load cell was employed as a unit memory cell. Cell size was 65 µm × 67 µm. All of the peripheral circuits were E/D DCFLs with 1.2 µm gate, except for sense amplifiers. To compare the sensing performances, four different types of sense amplifiers were implemented for four output bits in a single memory chip. The minimum X address access time, which was measured on a wafer with a probe card modified and calibrated for 50-ohm testing circuit, was 4.0ns. Power dissipation was 160-190 mW at the power supply voltage of 2.0 V.