Two-dimensional analysis of double-gate m.o.s. transistor
- 11 December 1969
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 5 (25) , 633-637
- https://doi.org/10.1049/el:19690474
Abstract
The principles of a new form of cascode m.o.s. device are discussed. A method of analysis for the derivation of d.c. characteristics is provided. Theoretical results have been validated by comparison with those of a practical device.Keywords
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