Performance Evaluation of Computing Systems with Memory Hierarchies
- 1 December 1967
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers
- Vol. EC-16 (6) , 764-773
- https://doi.org/10.1109/pgec.1967.264722
Abstract
Data transfers in computing systems with memory hierarchies usually prolong computing time and, consequently, cause degradation of system performance. A method to determine data processing rates and the relative utilization of memories for various system configurations under a variety of program loads is presented. According to this method, a program-independent ultimate data processing rate is derived from characteristics of the processor and the fastest random access memory of the system, and degradation factors are determined by combining statistics of the data flow of actual programs and hardware parameters of the processor and all memories. The statistics of data flow in the memory hierarchy are obtained by analyzing a number of recorded address traces of executed programs. The method presented permits quick evaluation of system performance for arbitrary time periods and for maximum and minimum concurrence of operation of processors and memories.Keywords
This publication has 3 references indexed in Scilit:
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