A 0.05- to 14-GHz MMIC 5-Bit Digital Attenuator
- 1 October 1987
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The design approach and the performance of a broadband (0.05- to 14-GHz) digitally controlled MMIC 5-bit attenuator are presented. Attenuator chips with total dimensions of 1.3 × 2.6 mm provide 15.5-dB dynamic range with 0.5-dB step resolution and excellent phase tracking. The circuit consists of a 2-bit chip containing 14 FETs with a total gate periphery of 3.98 mm within an area of 1.3 × 1.2 mm and a 3-bit chip containing 20 FETs with a gate periphery of 5.44 mm within an area of 1.3 × 1.4 mm.Keywords
This publication has 0 references indexed in Scilit: