Integer code generation for the TI TMS320C62X
- 1 January 2001
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 2, 1133-1136 vol.2
- https://doi.org/10.1109/icassp.2001.941121
Abstract
This paper presents a methodology which enables the generation of C62/spl times/ optimized fixed-point C-code from a floating-point description of an algorithm. The FRIDGE design environment transforms floating-point ANSI-C code with local fixed-point annotations into an internal bit-true representation. From this representation we generate C62/spl times/ optimized integer C code utilizing the code transformation techniques illustrated in this paper. A benchmark is presented comparing the efficiency of the generated code with C67/spl times/ C-code, C62/spl times/ floating-point emulation and generic integer ANSI-C code.Keywords
This publication has 2 references indexed in Scilit:
- System Level Fixed-point Design Based On An Interpolative ApproachPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- FRIDGE: a fixed-point design and simulation environmentPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002