A 40GOPS 250mW massively parallel processor based on matrix architecture

1 January 2006

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 1616-1625
https://doi.org/10.1109/isscc.2006.1696216

Abstract

The matrix processing engine (MTX) is a massively parallel processor based on the matrix architecture. 40GOPS (16b additions) is achieved at 200MHz clock frequency and 250mW power dissipation. 2048 ALUs and 1Mb SRAM connected by a flexible switching network are integrated in 3.1mm ² using a 90nm CMOS process

Keywords

RANDOM ACCESS MEMORY
REGISTERS
CIRCUITS
ENERGY EFFICIENCY
JOINING PROCESSES
HARDWARE
SWITCHES
CODECS
IMAGE PROCESSING
IMAGE RECOGNITION

This publication has 1 reference indexed in Scilit:

Creating the bluegene/l supercomputer from low-power SoC ASICs
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005