Digital Phase-Locked Loop Behavior with Clock and Sampler Quantization
- 1 August 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Communications
- Vol. 33 (8) , 753-759
- https://doi.org/10.1109/tcom.1985.1096384
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
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- Performance of a First-Order Transition Sampling Digital Phase-Locked Loop Using Random-Walk ModelsIEEE Transactions on Communications, 1972