Pulse response of interconnections in silicon integrated circuits

Abstract
A direct computation method is derived for analysis of metal-insulator-silicon microstrip structures and yields results in good correspondence with experimental work. This is extended to predict the performance of integrated-circuit interconnection geometries. High-resistivity silicon, despite the higher series loss, gives rise to faster lines, and there is a ‘critical resistivity’ dependent on line geometry and silicon-chip area below which poor performance will be obtained owing to skin effect in the substrate restricting return current flow entirely to the bulk silicon.

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