Practical support for parallel programming

6 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. 2, 109-118
https://doi.org/10.1109/hicss.1988.11796

Abstract

An approach is considered in which programs written within a higher-level parallel model are automatically transformed for execution on a particular (parallel) processor. It is based on an improved version of large-grain data-flow (LGDF) techniques. The model is described, along with a scheduler implementation strategy for shared-memory multiprocessors. Performance measurements of a specific implementation for the Sequent Balance 21000 are given. It is argued that the approach can provide the benefits of user-visible parallelism while avoiding the pitfalls inherent in hand-coding of parallel scheduling schemes.

Keywords

This publication has 2 references indexed in Scilit:

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