A monolithic phase-locked loop with post detection processor

1 February 1979

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits

Vol. 14 (1) , 155-161
https://doi.org/10.1109/JSSC.1979.1051154

Abstract

Describes the design and fabrication of a high-frequency (50-MHz) phase-locked loop with a post detection processor which allows the detection of FSK signals with few external components. The circuit operates with a single 5-V supply and has TTL compatible inputs and outputs.

Keywords

PHASE LOCKED LOOPS
PHASE DETECTION
FREQUENCY SHIFT KEYING
CIRCUITS
VOLTAGE
DEMODULATION
SCHOTTKY DIODES
SIGNAL PROCESSING
FILTERS
VOLTAGE-CONTROLLED OSCILLATORS

This publication has 2 references indexed in Scilit:

A highly stable VCO for application in monolithic phase-locked loops
IEEE Journal of Solid-State Circuits, 1975
A new wide-band amplifier technique
IEEE Journal of Solid-State Circuits, 1968