Compact electro‐thermal simulation of ESD‐protection elements

1 January 1994

journal article
research article
Published by Wiley in Quality and Reliability Engineering International

Vol. 10 (4) , 335-340
https://doi.org/10.1002/qre.4680100414

Abstract

Numerical simulations at the circuit level can improve the understanding of the behaviour of protection structures under system aspects. Full protection circuits with the influence of HBM ESD tester parasitics and additional parasitic elements in the circuitry have been investigated. Compact electro‐thermal models for single protection elements (diodes and snapback nMOSFETs) have been developed. They help to explain differences between expected ESD‐hardness and HBM‐failure thresholds of protection structures.

Keywords

This publication has 2 references indexed in Scilit:

Analysis of HBM ESD testers and specifications using a fourth‐order lumped element model
Quality and Reliability Engineering International, 1994
Compact Transistor Modelling for Circuit Design
Published by Springer Nature ,1990