Schottky-barriers on p-type GaInAs

1 March 1985

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 32 (3) , 605-609
https://doi.org/10.1109/t-ed.1985.21985

Abstract

On p-type Ga0.47In0.53As LPE-grown layers, Schottky diodes were fabricated with different metals and surface preparations. On chemically etched surfaces, diodes with ideality factors near unity but rather low breakdown voltages with soft breakdown were achieved. The barrier heights were between 0.4 and 0.7 eV depending on the work function of the metal. On sputter-cleaned surfaces the diodes exhibited high breakdown voltages and barrier heights of about 0.7 eV independent of the metal. Annealing of the diodes at 320°C resulted in reduced series resistances and barrier heights in the case of sputteretched surfaces. The junction seems to consist of two different barriers; the lower one is determined by an As segregation at the interface, whereas the higher one is caused by traps which are induced by the sputter process.

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