A family of VLSI designs for the motion compensation block-matching algorithm
- 1 January 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems
- Vol. 36 (10) , 1317-1325
- https://doi.org/10.1109/31.44348
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- A flexible VLSI architecture for full-search block-matching motion-vector estimationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Very high efficiency VLSI chip-pair for full search block matching with fractional precisionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- VLSI Implementation Of Motion Compensation Full-Search Block-Matching AlgorithmPublished by SPIE-Intl Soc Optical Eng ,1988
- Technical Issues In Low Rate Transform CodingPublished by SPIE-Intl Soc Optical Eng ,1988
- Displacement Measurement and Its Application in Interframe Image CodingIEEE Transactions on Communications, 1981