Carrier pocket engineering to design superior thermoelectric materials using GaAs/AlAs superlattices

A large enhancement in the thermoelectric figure of merit for the whole superlattice, $Z_{\mathrm{3D}}\mathrm{T,}$ is predicted for short-period GaAs/AlAs superlattices relative to bulk GaAs. Various superlattice parameters (superlattice growth direction, superlattice period, and layer thicknesses) are explored to optimize $Z_{\mathrm{3D}}\mathrm{T,}$ including quantum well states formed from carrier pockets at various high symmetry points in the Brillouin zone. The highest room-temperature $Z_{\mathrm{3D}}T$ obtained in the present calculation is 0.41 at the optimum carrier concentration for either (001)- or (111)-oriented GaAs (20 Å)/AlAs (20 Å) superlattices, which is about 50 times greater than the corresponding $\mathrm{ZT}$ for bulk GaAs.