Abstract
The use of device simulations to examine substrate-coupling noise induced by the switching of the transistor drain voltages is examined. Methods for reducing such noise are reported. The noise resulting from internal and external parasitics in the path of the substrate current flow is examined for structures with substrate contacts and additional guard rings and for both epitaxial and nonepitaxial substrates. A p/sup +/ guard ring, or substrate contact, between the digital circuits and noise sensitive components is found to be effective for reducing the substrate noise. In heavily doped substrates, a backside contact is an alternative method for noise reduction.

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