ION IMPLANTED InP MISFET's WITH LOW DRAIN CURRENT DRIFT
- 1 September 1988
- journal article
- Published by EDP Sciences in Le Journal de Physique Colloques
- Vol. 49 (C4) , C4-223
- https://doi.org/10.1051/jphyscol:1988446
Abstract
MIS field effect transistors on semi-insulating indium phosphide have been fabricated. The contacts and the channel are doped by silicon implantation. The gate dielectric is SiO2 deposited under UV activation. Depletion-mode devices with a 2-micron channel length have a saturation current drift less than 10 per cent in 24 hours. They are compatible with a laser technology for integrated opto-electronicsKeywords
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