Configurable multilayer CNN-UM emulator on FPGA

Abstract
A new emulated digital multilayer cellular neural network (universal machine (CNN-UM) chip architecture called Falcon has been developed. In this brief, the main steps of the field-programmable gate array (FPGA) implementation are introduced. The main results are as follows. The CNN-UM architecture emulated on Xilinx Virtex series FPGA, three-dimensional nonlinear spatio-temporal dynamics can be implemented on this architecture. The critical parameters of the implementation in a single-layer configuration are 55 million cell update/s/processor core, or, equivalently 1 giga-operation per second (GOPS) computing performance. In the face of the high performance, the power requirements of the architecture are relatively low only /spl sim/3 W per processor core. Using reconfigurable devices to implement emulated digital architectures provides more flexibility compared to the custom very large-scale integration designs because different Falcon architectures can be used on the same FPGA device.

This publication has 6 references indexed in Scilit: