An error-correcting 14b/20 µ s CMOS A/D converter
- 1 January 1981
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. XXIV, 62-63
- https://doi.org/10.1109/isscc.1981.1156178
Abstract
A 4.1×4.2mm monolithic CMOS A/D converter chip using a thin-film non-binary 17b DAC that resembles a R-2R ladder, but uses a radix of about 1.85, instead of 2, a conversion algorithm and a calibration EPROM, will be reported.Keywords
This publication has 0 references indexed in Scilit: