VLSI architectures for metric normalization in the Viterbi algorithm
- 1 January 1990
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1723-1728 vol.4
- https://doi.org/10.1109/icc.1990.117356
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- An alternative to metric rescaling in Viterbi decodersIEEE Transactions on Communications, 1989
- Error-Correction Coding for Digital CommunicationsPublished by Springer Nature ,1981
- Adaptive Maximum-Likelihood Receiver for Carrier-Modulated Data-Transmission SystemsIEEE Transactions on Communications, 1974
- The viterbi algorithmProceedings of the IEEE, 1973
- Optimal Reception for Binary Partial Response ChannelsBell System Technical Journal, 1972