Impact of silicon substrates on leakage currents

1 November 1983

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters

Vol. 4 (11) , 403-405
https://doi.org/10.1109/EDL.1983.25780

Abstract

Leakage currents of n+-p-diodes, made on four different groups of p-type silicon substrates, are investigated at temperatures between 50 and 120°C. At these temperatures, diffusion of thermally generated minority carriers from the bulk is the dominant leakage current mechanism and determines the holding time of dynamic memories. Measurements at these temperatures show that for Czochral-sky-grown wafers (CZ) with a high interstitial oxygen concentration as is used for intrinsic gettering, the leakage current densities are about 1O× higher than for CZ wafers with a low oxygen concentration or floating-zone wafers (FZ), and are about 100× higher than for p-p+-epitaxial substrates. Simple analytical formulas explaining these large differences will be presented. Finally a short discussion about the optimum substrate for future high-density memories will be given.

Keywords

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