Transistor design for low distortion at high frequencies
- 1 December 1976
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 23 (12) , 1290-1297
- https://doi.org/10.1109/T-ED.1976.18652
Abstract
The design of high-frequency bipolar transistors with very low distortion is described. Simple expressions for distortion are used to select device parameters for the optimization of distortion performance. The effect of epitaxial-layer characteristics on device performance is considered in detail, and the importance of collector depletion in achieving low distortion is shown. The influence of device geometry on distortion is considered, and the degradation caused by MOS capacitance is illustrated.Keywords
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