Sub-10 ps high-gain direct coupled Josephson logic gate
- 14 April 1983
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 19 (8) , 291-292
- https://doi.org/10.1049/el:19830203
Abstract
A cascade chain of high-gain direct coupled logic gates with a 25×20 μm2 gate size was designed and fabricated using Pb-alloy Josephson technology with Josephson junctions of 3 μm diameter and 2 μm line-width resistors. Logic delays as low as 9 ps and power-delay products as small as 30 aJ were experimentally obtained.Keywords
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