Some Systolic Array Developments in the United Kingdom

This publication has 12 references indexed in Scilit:

• A high speed CMOS/SOS implementation of a bit level systolic correlator
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005
• Use of unidirectional data flow in bit-level systolic array chips
  Electronics Letters, 1986
• A Systolic Array For Linearly Constrained Least-Squares Problems
  Published by SPIE-Intl Soc Optical Eng ,1986
• A novel algorithm and architecture for adaptive digital beamforming
  IEEE Transactions on Antennas and Propagation, 1986
• Bit-level systolic array implementation of the winograd fourier transform algorithm
  IEE Proceedings F Communications, Radar and Signal Processing, 1985
• Systolic matrix and vector multiplication methods for signal processing
  IEE Proceedings F Communications, Radar and Signal Processing, 1984
• Recursive Least-Squares Minimization Using A Systolic Array
  Published by SPIE-Intl Soc Optical Eng ,1983
• Matrix Triangularization By Systolic Arrays
  Published by SPIE-Intl Soc Optical Eng ,1982
• Implementation of signal processing functions using 1-bit systolic arrays
  Electronics Letters, 1982
• Least Squares Computations by Givens Transformations Without Square Roots
  IMA Journal of Applied Mathematics, 1973