The Organization and Use of Parallel Memories
- 1 December 1971
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-20 (12) , 1566-1569
- https://doi.org/10.1109/t-c.1971.223171
Abstract
As computer CPUs get faster, primary memories tend to be organized in parallel banks. The fastest machines now being developed can fetch of the order of 100 words in parallel. Unless memory and compiler designers are careful, serious memory conflicts and resulting performance degradation may result. Some of the important questions of design and use of such memories are discussed.Keywords
This publication has 1 reference indexed in Scilit:
- ILLIAC IV Software and Application ProgrammingIEEE Transactions on Computers, 1968