Validation of neural net architectures on speech recognition tasks
- 1 January 1991
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 15206149,p. 97-100 vol.1
- https://doi.org/10.1109/icassp.1991.150287
Abstract
Using two speech recognition tasks, the authors compared the performance and behavior of time delay neural networks (NN), learning vector quantization, and a modular architecture. This set of experiments makes it possible to investigate the capabilities of the models and demonstrate some of their weaknesses. Good performance was obtained through the use of sophisticated architectures which encompass the limitations of more basic NN models. This is particularly clear for a phoneme experiment where it was possible to increase the performances until they were far better than those of traditional classifiers. This improvement was obtained in successive steps by using modified cost functions or algorithms and building a combined architecture. These results illustrate that current NN algorithms can be greatly improved. Modular architectures like the one used are a promising way to do this.Keywords
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