A single chip MPEG1 decoder

19 November 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 65-66
https://doi.org/10.1109/vlsic.1995.520687

Abstract

A single chip MPEG1 decoder was developed. It contains MPEG1 video/audio/system decoders and also include a GD-ROM decoder for package media application. The outstanding feature of the chip is its high quality control of MPEG1 system such as buffer management and AV synchronization. The chip basically decodes a MPEG1 stream automatically without the support of an external microprocessor. The circuit was designed using dedicated hardwired logic resulting in a low cost and low power chip.

Keywords

DECODING
PACKAGING
QUALITY CONTROL
QUALITY MANAGEMENT
POWER SYSTEM MANAGEMENT
STREAMING MEDIA
MICROPROCESSORS
LOGIC DESIGN
LOGIC CIRCUITS
COSTS

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