A single-chip codec with switched-capacitor filters

Abstract
A single-chip CMOS codec with filters has been developed using charge redistribution and switched-capacitor techniques. Its features are ~30 mm/SUP 2/ small chip area, 35 mW low power dissipation, and small 16 pin package. These are achieved with novel analog circuit techniques for A/D and D/A conversions and clock generation. Measured transmission characteristics meet the system requirements.

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