On the optimization of silicon film thickness in thin-film SOI devices

13 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 13-14
https://doi.org/10.1109/soi.1989.69742

Abstract

Form only given. It is shown that in order to obtain fully depleted SOI MOSFETs with suitable values of threshold voltage (around 0.6 V for the n-channel device), a silicon film thickness smaller than 100 nm must be used. 70 nm should be sufficiently thin. This observation is quite independent of the magnitude of (fixed) oxide charge densities, although the absolute value of the threshold voltage is greatly influenced by the density charges. The subthreshold slope of p-channel devices is much less sensitive to film thickness and always shows values lower than 75 mV/dec, provided the silicon film is thin enough to allow for full depletion of the device of the OFF state Author(s) Colinge, J.-P. IMEC, Leuven, Belgium Tack, M.

Keywords

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