High-speed regenerator section terminating LSIs
- 11 November 1993
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 29 (23) , 2057-2058
- https://doi.org/10.1049/el:19931374
Abstract
The Letter reports the first four-chip set for the STM-64 regenerator-section terminator, a key component of the next generation SDH transmission system. The Si-bipolar gate-array LSIs are fabricated and tested to confirm operation at 1.244 Gbit / s. This result makes it feasible to construct the line terminators needed.Keywords
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