Poisson-based analysis of spreading resistance profiles

Abstract
This paper discusses carrier diffusion-induced problems that occur in profiling certain silicon structures with the spreading resistance technique. Such structures include p- and n-wells, lightly doped epitaxial layers and very thin epitaxial or diffused layers. Various methods for resolving carrier diffusion problems are discussed. A new method, which we call SRP2, is introduced. In the SRP2 process, the Poisson equation is used to calculate a spreading resistance profile from an assumed dopant profile (usually deduced from conventional spreading resistance analysis or generated by a process simulator such as suprem or predict); the calculated spreading resistance profile is then compared to a measured profile to ‘‘proof-test’’ the assumed dopant profile. Examples of the SRP2 process will be shown for CMOS p- and n-wells and for several other layers, including thin epitaxial and very shallow source-drain layers. The limits of Poisson-based analysis for ultra-shallow layers will be discussed.

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