Balanced delay trees and combinatorial division in VLSI
- 1 October 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 21 (5) , 814-819
- https://doi.org/10.1109/jssc.1986.1052612
Abstract
No abstract availableKeywords
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- An NMOS 64b floating-point chip setPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Radix 16 SRT dividers with overlapped quotient selection stages: A 225 nanosecond double precision divider for the S-1 Mark IIBPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- 64 bit monolithic floating point processorsIEEE Journal of Solid-State Circuits, 1982