Functionally Parallel Architecture for Array Processors

1 September 1981

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in Computer

Vol. 14 (9) , 28-36
https://doi.org/10.1109/c-m.1981.220596

Abstract

Based on the natural division of mathematical problems, functional parallelism becomes the architectural key for improving speed/cost ratios for array processors.

Keywords

PARALLEL ARCHITECTURES
HARDWARE
PARALLEL PROCESSING
PROGRAMMABLE LOGIC ARRAYS
CONCURRENT COMPUTING
PARALLEL PROGRAMMING
FLOATING-POINT ARITHMETIC
LOGIC ARRAYS
CLUSTERING ALGORITHMS
FUNCTIONAL PROGRAMMING