Induced end-of-life errors in a fast settling PLL
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 261-269
- https://doi.org/10.1109/freq.1993.367405
Abstract
The authors present a mathematical description of the second-order type II PLL (phase-locked loop), which may deviate from ideal when undesired inputs, commonly arising in hardware, are incurred by the system. Satisfactory EOL (end-of-life) performance is guaranteed when such transients are accounted for. The authors present a methodology for predicting expected EOL LSE excursions and demonstrate the system's dependence on this parameter. A PSpice model and empirical data from a 5-GHz spaceborne PLL verify acceptable degradation at EOL when an EOL transient is present.Keywords
This publication has 2 references indexed in Scilit:
- Sensitivity of fast settling PLLs to differential loop filter component variationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A Short Survey of Frequency Synthesizer TechniquesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986