New split FET technique for measurements of source series resistance applied to amorphous silicon thin film transistors

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Abstract
A split field-effect transistor (SFET) is proposed for measuring source and drain series resistances. This device is made by splitting a conventional thin-film transistor (TFT) from the source to the drain in such a way that the gate width of each half is a linear function of the distance from the source. The analysis shows that the intrinsic current-voltage characteristics of such a device should be symmetrical with respect to the polarity of the drain-to-source voltage. Hence, the observed asymmetry of the device characteristic yields direct information about the differences between source and drain series resistances, which are inversely proportional to the contact width. For an a-Si TFT it is shown that the source series resistance is proportional to the inverse square root of the drain current in a wide range of currents. The technique can be applied to a large variety of FETs. For a-Si TFTs, it provides an accurate tool for determining the effects of contact overlap, bias stress, and temperature dependences of series resistances.