Simultaneous logical equations: Matrix logic IV

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in Transactions of the American Institute of Electrical Engineers, Part I: Communication and Electronics

Vol. 78 (6) , 1080-1083
https://doi.org/10.1109/TCE.1960.6368521

Abstract

A new method for reducing logical problems of higher complexity based on matrix logic is presented. Sets of propositions related to a set of constraints are transformed into minimum form without iterative simplifications. The savings in design effort and hardware for the eventual circuit are demonstrated in a reference problem.

Keywords

EQUATIONS
MATRICES
MERGING
INDEXES
SYMMETRIC MATRICES
SWITCHES
COMPLEXITY THEORY